"Fossies" - the Fresh Open Source Software Archive

Member "highlight-3.57-x64/langDefs/vhd.lang" (12 May 2020, 3684 Bytes) of package /windows/www/highlight-3.57-x64.zip:


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    1 
    2 Description="VHDL"
    3 
    4 Categories = {"hardware"}
    5 
    6 Keywords={
    7   { Id=1,
    8     List={"abs", "access", "after", "all", "and", "architecture", "array",
    9             "assert", "attribute", "begin", "block", "body", "buffer", "bus", "case",
   10             "component", "configuration", "disconnect", "downto", "else", "elsif", "end",
   11             "entity", "exit", "file", "for", "function", "generate", "generic", "group",
   12             "guarded", "if", "impure", "in", "inertial", "inout", "is", "label", "library",
   13             "linkage", "literal", "loop", "map", "mod", "nand", "new", "next", "nor", "not",
   14             "null", "of", "on", "open", "or", "others", "out", "package", "port",
   15             "postponed", "procedure", "process", "pure", "range", "record", "register",
   16             "reject", "rem", "report", "return", "rol", "ror", "select", "severity",
   17             "shared", "sla", "sll", "sra", "srl", "then", "to", "transport", "unaffected",
   18             "units", "until", "use",  "wait", "when", "while", "with", "xnor", "xor",
   19             "activpullup", "andn", "and2ff", "andnff", "cnt1bit", "cntnbit", "cntnbitdown",
   20             "cntnbitmod", "cntnbitoe", "cntnbitsld", "cntnbitsr", "cntnbitupdown",
   21             "compnbit", "compnbitff", "diffh2lwithff", "diffl2hwithff", "dff1",
   22             "dff1negclk", "dffn", "encode4to5", "mux1of2", "mux1of8", "mux1vof2v",
   23             "mux1vof3v", "mux1vof4v", "prescale1bit", "prescale1bitar",
   24             "prescale1bitarnegclk", "prescalenbit", "prescalenbitar", "reg1bit",
   25             "reg1bitar", "reg1bitr", "regnbit", "regnbitar", "rsffasync", "rsffsync",
   26             "rssynchronizer", "shiftp2sregnbitar", "shiftregnbitar", "shifts2sregnbit",
   27             "srffsync", "syncanddiffl2hwithff", "syncanddiffh2lwithff",
   28             "syncanddiffl2hwithffandfg", "syncanddiffh2lwithffandfg",
   29             "syncanddiffll2hhwithff", "syncanddiffhh2llwithff",
   30             "syncanddiffll2hhwithffandfg", "syncanddiffhh2llwithffandfg",
   31             "activpullup_arch", "andn_arch", "and2ff_arch", "andnff_arch", "cnt1bit_arch",
   32             "cntnbit_arch", "cntnbitdown_arch", "cntnbitmod_arch", "cntnbitoe_arch",
   33             "cntnbitsld_arch", "cntnbitsr_arch", "cntnbitupdown_arch", "compnbit_arch",
   34             "compnbitff_arch", "diffh2lwithff_arch", "diffl2hwithff_arch", "dff1_arch",
   35             "dff1negclk_arch", "dffn_arch", "encode4to5_arch", "mux1of2_arch",
   36             "mux1of8_arch", "mux1vof2v_arch", "mux1vof3v_arch", "mux1vof4v_arch",
   37             "prescale1bit_arch", "prescale1bitar_arch", "prescale1bitarnegclk_arch",
   38             "prescalenbit_arch", "prescalenbitar_arch", "reg1bit_arch", "reg1bitar_arch",
   39             "reg1bitr_arch", "regnbit_arch", "regnbitar_arch", "rsffasync_arch",
   40             "rsffsync_arch", "rssynchronizer_arch", "shiftp2sregnbitar_arch",
   41             "shiftregnbitar_arch", "shifts2sregnbit_arch", "srffsync_arch",
   42             "syncanddiffl2hwithff_arch", "syncanddiffh2lwithff_arch",
   43             "syncanddiffl2hwithffandfg_arch", "syncanddiffh2lwithffandfg_arch",
   44             "syncanddiffll2hhwithff_arch", "syncanddiffhh2llwithff_arch",
   45             "syncanddiffll2hhwithffandfg_arch", "syncanddiffhh2llwithffandfg_arch"},
   46   },
   47   { Id=2,
   48     List={  "bit", "bit_vector", "boolean", "integer", "real", "std_logic",
   49             "std_logic_vector", "time", "character", "string"},
   50   },
   51   { Id=3,
   52     List={"alias", "constant", "type", "variable", "signal", "subtype"},
   53   },
   54   { Id=4,
   55     Regex=[[[\w\(\)]+('\w+)]],
   56   },
   57 }
   58 
   59 Strings={
   60   Delimiter=[[']],
   61 }
   62 
   63 IgnoreCase=true
   64 
   65 Comments={
   66   { Block=false,
   67     Delimiter= { [[\-\-]] },
   68   },
   69 }
   70 
   71 Operators=[[\(|\)|\[|\]|\{|\}|\,|\;|\:|\&|<|>|\!|\=|\/|\*|\%|\+|\-]]
   72