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Member "xorg-server-1.20.5/hw/xfree86/ramdac/BT.c" (30 May 2019, 5311 Bytes) of package /linux/misc/xorg-server-1.20.5.tar.bz2:


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    1 /*
    2  * Copyright 1998 by Alan Hourihane, Wigan, England.
    3  *
    4  * Permission to use, copy, modify, distribute, and sell this software and its
    5  * documentation for any purpose is hereby granted without fee, provided that
    6  * the above copyright notice appear in all copies and that both that
    7  * copyright notice and this permission notice appear in supporting
    8  * documentation, and that the name of Alan Hourihane not be used in
    9  * advertising or publicity pertaining to distribution of the software without
   10  * specific, written prior permission.  Alan Hourihane makes no representations
   11  * about the suitability of this software for any purpose.  It is provided
   12  * "as is" without express or implied warranty.
   13  *
   14  * ALAN HOURIHANE DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
   15  * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
   16  * EVENT SHALL ALAN HOURIHANE BE LIABLE FOR ANY SPECIAL, INDIRECT OR
   17  * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
   18  * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
   19  * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
   20  * PERFORMANCE OF THIS SOFTWARE.
   21  *
   22  * Authors:  Alan Hourihane, <alanh@fairlite.demon.co.uk>
   23  *
   24  * BT RAMDAC routines.
   25  */
   26 
   27 #ifdef HAVE_XORG_CONFIG_H
   28 #include <xorg-config.h>
   29 #endif
   30 
   31 #include "xf86.h"
   32 #include "xf86_OSproc.h"
   33 
   34 #define INIT_BT_RAMDAC_INFO
   35 #include "BTPriv.h"
   36 #include "xf86RamDacPriv.h"
   37 
   38 void
   39 BTramdacRestore(ScrnInfoPtr pScrn, RamDacRecPtr ramdacPtr,
   40                 RamDacRegRecPtr ramdacReg)
   41 {
   42     int i;
   43 
   44     /* Here we pass a short, so that we can evaluate a mask too */
   45     /* So that the mask is the high byte and the data the low byte */
   46     /* Just the command/status registers */
   47     for (i = 0x06; i < 0x0A; i++)
   48         (*ramdacPtr->WriteDAC)
   49             (pScrn, i, (ramdacReg->DacRegs[i] & 0xFF00) >> 8,
   50              ramdacReg->DacRegs[i]);
   51 }
   52 
   53 void
   54 BTramdacSave(ScrnInfoPtr pScrn, RamDacRecPtr ramdacPtr,
   55              RamDacRegRecPtr ramdacReg)
   56 {
   57     int i;
   58 
   59     (*ramdacPtr->ReadAddress) (pScrn, 0);       /* Start at index 0 */
   60     for (i = 0; i < 768; i++)
   61         ramdacReg->DAC[i] = (*ramdacPtr->ReadData) (pScrn);
   62 
   63     /* Just the command/status registers */
   64     for (i = 0x06; i < 0x0A; i++)
   65         ramdacReg->DacRegs[i] = (*ramdacPtr->ReadDAC) (pScrn, i);
   66 }
   67 
   68 RamDacHelperRecPtr
   69 BTramdacProbe(ScrnInfoPtr pScrn,
   70               RamDacSupportedInfoRecPtr ramdacs /*, RamDacRecPtr ramdacPtr */ )
   71 {
   72     RamDacRecPtr ramdacPtr = RAMDACSCRPTR(pScrn);
   73     Bool RamDacIsSupported = FALSE;
   74     RamDacHelperRecPtr ramdacHelperPtr = NULL;
   75     int BTramdac_ID = -1;
   76     int i, status, cmd0;
   77 
   78     /* Save COMMAND Register 0 */
   79     cmd0 = (*ramdacPtr->ReadDAC) (pScrn, BT_COMMAND_REG_0);
   80     /* Ensure were going to access the STATUS Register on next read */
   81     (*ramdacPtr->WriteDAC) (pScrn, BT_COMMAND_REG_0, 0x7F, 0x00);
   82 
   83     status = (*ramdacPtr->ReadDAC) (pScrn, BT_STATUS_REG);
   84     switch (status) {
   85     case 0x40:
   86         BTramdac_ID = ATT20C504_RAMDAC;
   87         break;
   88     case 0xD0:
   89         BTramdac_ID = ATT20C505_RAMDAC;
   90         break;
   91     default:
   92         xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
   93                    "Unknown BT RAMDAC type (0x%x), assuming BT485\n", status);
   94     case 0x80:
   95     case 0x90:
   96     case 0xA0:
   97     case 0xB0:
   98     case 0x28:                 /* This is for the DEC TGA - Questionable ? */
   99         BTramdac_ID = BT485_RAMDAC;
  100         break;
  101     }
  102 
  103     /* Restore COMMAND Register 0 */
  104     (*ramdacPtr->WriteDAC) (pScrn, BT_COMMAND_REG_0, 0x00, cmd0);
  105 
  106     if (BTramdac_ID == -1) {
  107         xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
  108                    "Cannot determine BT RAMDAC type, aborting\n");
  109         return NULL;
  110     }
  111     else {
  112         xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
  113                    "Attached RAMDAC is %s\n",
  114                    BTramdacDeviceInfo[BTramdac_ID & 0xFFFF].DeviceName);
  115     }
  116 
  117     for (i = 0; ramdacs[i].token != -1; i++) {
  118         if (ramdacs[i].token == BTramdac_ID)
  119             RamDacIsSupported = TRUE;
  120     }
  121 
  122     if (!RamDacIsSupported) {
  123         xf86DrvMsg(pScrn->scrnIndex, X_PROBED,
  124                    "This BT RAMDAC is NOT supported by this driver, aborting\n");
  125         return NULL;
  126     }
  127 
  128     ramdacHelperPtr = RamDacHelperCreateInfoRec();
  129     switch (BTramdac_ID) {
  130     case BT485_RAMDAC:
  131         ramdacHelperPtr->SetBpp = BTramdacSetBpp;
  132         break;
  133     }
  134     ramdacPtr->RamDacType = BTramdac_ID;
  135     ramdacHelperPtr->RamDacType = BTramdac_ID;
  136     ramdacHelperPtr->Save = BTramdacSave;
  137     ramdacHelperPtr->Restore = BTramdacRestore;
  138 
  139     return ramdacHelperPtr;
  140 }
  141 
  142 void
  143 BTramdacSetBpp(ScrnInfoPtr pScrn, RamDacRegRecPtr ramdacReg)
  144 {
  145     /* We need to deal with Direct Colour visuals for 8bpp and other
  146      * good stuff for colours */
  147     switch (pScrn->bitsPerPixel) {
  148     case 32:
  149         ramdacReg->DacRegs[BT_COMMAND_REG_1] = 0x10;
  150         break;
  151     case 24:
  152         ramdacReg->DacRegs[BT_COMMAND_REG_1] = 0x10;
  153         break;
  154     case 16:
  155         ramdacReg->DacRegs[BT_COMMAND_REG_1] = 0x38;
  156         break;
  157     case 15:
  158         ramdacReg->DacRegs[BT_COMMAND_REG_1] = 0x30;
  159         break;
  160     case 8:
  161         ramdacReg->DacRegs[BT_COMMAND_REG_1] = 0x40;
  162         break;
  163     case 4:
  164         ramdacReg->DacRegs[BT_COMMAND_REG_1] = 0x60;
  165         break;
  166     }
  167 }