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    1 .TH I2CGET 8 "July 2021"
    2 .SH "NAME"
    3 i2cget \- read from I2C/SMBus chip registers
    4 
    5 .SH SYNOPSIS
    6 .B i2cget
    7 .RB [ -f ]
    8 .RB [ -y ]
    9 .RB [ -a ]
   10 .I i2cbus
   11 .I chip-address
   12 .RI [ "data-address " [ "mode " [ length ]]]
   13 .br
   14 .B i2cget
   15 .B -V
   16 
   17 .SH DESCRIPTION
   18 i2cget is a small helper program to read registers visible through the I2C
   19 bus (or SMBus).
   20 
   21 .SH OPTIONS
   22 .TP
   23 .B -V
   24 Display the version and exit.
   25 .TP
   26 .B -f
   27 Force access to the device even if it is already busy. By default, i2cget
   28 will refuse to access a device which is already under the control of a
   29 kernel driver. Using this flag is dangerous, it can seriously confuse the
   30 kernel driver in question. It can also cause i2cget to return an invalid
   31 value. So use at your own risk and only if you know what you're doing.
   32 .TP
   33 .B -y
   34 Disable interactive mode. By default, i2cget will wait for a confirmation
   35 from the user before messing with the I2C bus. When this flag is used, it
   36 will perform the operation directly. This is mainly meant to be used in
   37 scripts. Use with caution.
   38 .TP
   39 .B -a
   40 Allow using addresses between 0x00 - 0x07 and 0x78 - 0x7f. Not recommended.
   41 .PP
   42 There are two required options to i2cget. \fIi2cbus\fR indicates the number
   43 or name of the I2C bus to be scanned.  This number should correspond to one of
   44 the busses listed by \fIi2cdetect -l\fR. \fIchip-address\fR specifies the
   45 address of the chip on that bus, and is an integer between 0x08 and 0x77.
   46 .PP
   47 \fIdata-address\fR specifies the address on that chip to read from, and is
   48 an integer between 0x00 and 0xFF. If omitted, the currently active register
   49 will be read (if that makes sense for the considered chip).
   50 .PP
   51 The \fImode\fR parameter, if specified, is one of the letters \fBb\fP,
   52 \fBw\fP, \fBc\fP, or \fBi\fP, corresponding to a read byte data, a read
   53 word data, a write byte/read byte, an SMBus block read, or an I2C block read
   54 transaction, respectively. A \fBp\fP can also be appended to the \fImode\fR
   55 parameter to enable PEC, except for I2C block transactions. If the \fImode\fR
   56 parameter is omitted,
   57 i2cget defaults to a read byte data transaction, unless \fIdata-address\fR is
   58 also omitted, in which case the default (and only valid) transaction is a
   59 single read byte.
   60 .PP
   61 The \fIlength\fR parameter, if applicable and specified, sets the length
   62 of the block transaction. Valid values are between 1 and 32. Default value
   63 is 32.
   64 
   65 .SH WARNING
   66 i2cget can be extremely dangerous if used improperly. I2C and SMBus are designed
   67 in such a way that an SMBus read transaction can be seen as a write transaction by
   68 certain chips. This is particularly true if setting \fImode\fR to \fBcp\fP (write byte/read
   69 byte with PEC). Be extremely careful using this program.
   70 
   71 .SH EXAMPLES
   72 .PP
   73 Get the value of 8-bit register 0x11 of the I2C device at 7-bit address 0x2d
   74 on bus 1 (i2c-1), after user confirmation:
   75 .nf
   76 .RS
   77 # i2cget 1 0x2d 0x11
   78 .RE
   79 .fi
   80 .PP
   81 Get the value of 16-bit register 0x00 of the I2C device at 7-bit address 0x48
   82 on bus 1 (i2c-1), after user confirmation:
   83 .nf
   84 .RS
   85 # i2cget 1 0x48 0x00 w
   86 .RE
   87 .fi
   88 .PP
   89 Set the internal pointer register of a 24C02 EEPROM at 7-bit address 0x50
   90 on bus 9 (i2c-9) to 0x00, then read the first 2 bytes from that EEPROM:
   91 .nf
   92 .RS
   93 # i2cset -y 9 0x50 0x00 ; i2cget -y 9 0x50 ; i2cget -y 9 0x50
   94 .RE
   95 .fi
   96 This assumes that the device automatically increments its internal pointer
   97 register on every read, and supports read byte transactions (read without
   98 specifying the register address, "Receive Byte" in SMBus terminology.)
   99 Most EEPROM devices behave that way. Note that this is only safe as long as
  100 nobody else is accessing the I2C device at the same time. A safer approach
  101 would be to use a "Read Word" SMBus transaction instead, or an I2C Block
  102 Read transaction to read more than 2 bytes.
  103 .PP
  104 Set the internal pointer register of a 24C32 EEPROM at 7-bit address 0x53
  105 on bus 9 (i2c-9) to 0x0000, then read the first 2 bytes from that EEPROM:
  106 .nf
  107 .RS
  108 # i2cset -y 9 0x53 0x00 0x00 ; i2cget -y 9 0x53 ; i2cget -y 9 0x53
  109 .RE
  110 .fi
  111 This again assumes that the device automatically increments its internal
  112 pointer register on every read, and supports read byte transactions. While
  113 the previous example was for a small EEPROM using 8-bit internal addressing,
  114 this example is for a larger EEPROM using 16-bit internal addressing. Beware
  115 that running this command on a small EEPROM using 8-bit internal addressing
  116 would actually \fIwrite\fR 0x00 to the first byte of that EEPROM. The safety
  117 concerns raised above still stand, however in this case there is no SMBus
  118 equivalent, so this is the only way to read data from a large EEPROM if your
  119 master isn't fully I2C capable. With a fully I2C capable master, you would
  120 use \fIi2ctransfer\fR to achieve the same in a safe and faster way.
  121 .PP
  122 Read the first 8 bytes of an EEPROM device at 7-bit address 0x50
  123 on bus 4 (i2c-4):
  124 .nf
  125 .RS
  126 # i2cget -y 4 0x50 0x00 i 8
  127 .RE
  128 .fi
  129 
  130 .SH BUGS
  131 To report bugs or send fixes, please write to the Linux I2C mailing list
  132 <linux-i2c@vger.kernel.org> with Cc to the current maintainer:
  133 Jean Delvare <jdelvare@suse.de>.
  134 
  135 .SH SEE ALSO
  136 i2cdetect(8), i2cdump(8), i2cset(8), i2ctransfer(8)
  137 
  138 .SH AUTHOR
  139 Jean Delvare
  140 
  141 This manual page was strongly inspired from those written by David Z Maze
  142 for i2cset.