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Member "ethtool-5.1/amd8111e.c" (24 Aug 2016, 7231 Bytes) of package /linux/misc/ethtool-5.1.tar.xz:


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    1 
    2 /* Copyright (C) 2003  Advanced Micro Devices Inc. */
    3 #include <stdio.h>
    4 #include "internal.h"
    5 
    6 typedef enum {
    7     /* VAL2 */
    8     RDMD0           = (1 << 16),
    9     /* VAL1 */
   10     TDMD3           = (1 << 11),
   11     TDMD2           = (1 << 10),
   12     TDMD1           = (1 << 9),
   13     TDMD0           = (1 << 8),
   14     /* VAL0 */
   15     UINTCMD         = (1 << 6),
   16     RX_FAST_SPND        = (1 << 5),
   17     TX_FAST_SPND        = (1 << 4),
   18     RX_SPND         = (1 << 3),
   19     TX_SPND         = (1 << 2),
   20     INTREN          = (1 << 1),
   21     RUN         = (1 << 0),
   22 
   23     CMD0_CLEAR      = 0x000F0F7F,   /* Command style register */
   24 
   25 }CMD0_BITS;
   26 typedef enum {
   27 
   28     /* VAL3 */
   29     CONDUIT_MODE        = (1 << 29),
   30     /* VAL2 */
   31     RPA         = (1 << 19),
   32     DRCVPA          = (1 << 18),
   33     DRCVBC          = (1 << 17),
   34     PROM            = (1 << 16),
   35     /* VAL1 */
   36     ASTRP_RCV       = (1 << 13),
   37     RCV_DROP0       = (1 << 12),
   38     EMBA            = (1 << 11),
   39     DXMT2PD         = (1 << 10),
   40     LTINTEN         = (1 << 9),
   41     DXMTFCS         = (1 << 8),
   42     /* VAL0 */
   43     APAD_XMT        = (1 << 6),
   44     DRTY            = (1 << 5),
   45     INLOOP          = (1 << 4),
   46     EXLOOP          = (1 << 3),
   47     REX_RTRY        = (1 << 2),
   48     REX_UFLO        = (1 << 1),
   49     REX_LCOL        = (1 << 0),
   50 
   51     CMD2_CLEAR      = 0x3F7F3F7F,   /* Command style register */
   52 
   53 }CMD2_BITS;
   54 typedef enum {
   55 
   56     /* VAL3 */
   57     ASF_INIT_DONE_ALIAS = (1 << 29),
   58     /* VAL2 */
   59     JUMBO           = (1 << 21),
   60     VSIZE           = (1 << 20),
   61     VLONLY          = (1 << 19),
   62     VL_TAG_DEL      = (1 << 18),
   63     /* VAL1 */
   64     EN_PMGR         = (1 << 14),
   65     INTLEVEL        = (1 << 13),
   66     FORCE_FULL_DUPLEX   = (1 << 12),
   67     FORCE_LINK_STATUS   = (1 << 11),
   68     APEP            = (1 << 10),
   69     MPPLBA          = (1 << 9),
   70     /* VAL0 */
   71     RESET_PHY_PULSE     = (1 << 2),
   72     RESET_PHY       = (1 << 1),
   73     PHY_RST_POL     = (1 << 0),
   74 
   75 }CMD3_BITS;
   76 typedef enum {
   77 
   78     INTR            = (1 << 31),
   79     PCSINT          = (1 << 28),
   80     LCINT           = (1 << 27),
   81     APINT5          = (1 << 26),
   82     APINT4          = (1 << 25),
   83     APINT3          = (1 << 24),
   84     TINT_SUM        = (1 << 23),
   85     APINT2          = (1 << 22),
   86     APINT1          = (1 << 21),
   87     APINT0          = (1 << 20),
   88     MIIPDTINT       = (1 << 19),
   89     MCCINT          = (1 << 17),
   90     MREINT          = (1 << 16),
   91     RINT_SUM        = (1 << 15),
   92     SPNDINT         = (1 << 14),
   93     MPINT           = (1 << 13),
   94     SINT            = (1 << 12),
   95     TINT3           = (1 << 11),
   96     TINT2           = (1 << 10),
   97     TINT1           = (1 << 9),
   98     TINT0           = (1 << 8),
   99     UINT            = (1 << 7),
  100     STINT           = (1 << 4),
  101     RINT0           = (1 << 0),
  102 
  103 }INT0_BITS;
  104 typedef enum {
  105 
  106     /* VAL3 */
  107     LCINTEN         = (1 << 27),
  108     APINT5EN        = (1 << 26),
  109     APINT4EN        = (1 << 25),
  110     APINT3EN        = (1 << 24),
  111     /* VAL2 */
  112     APINT2EN        = (1 << 22),
  113     APINT1EN        = (1 << 21),
  114     APINT0EN        = (1 << 20),
  115     MIIPDTINTEN     = (1 << 19),
  116     MCCIINTEN       = (1 << 18),
  117     MCCINTEN        = (1 << 17),
  118     MREINTEN        = (1 << 16),
  119     /* VAL1 */
  120     SPNDINTEN       = (1 << 14),
  121     MPINTEN         = (1 << 13),
  122     TINTEN3         = (1 << 11),
  123     SINTEN          = (1 << 12),
  124     TINTEN2         = (1 << 10),
  125     TINTEN1         = (1 << 9),
  126     TINTEN0         = (1 << 8),
  127     /* VAL0 */
  128     STINTEN         = (1 << 4),
  129     RINTEN0         = (1 << 0),
  130 
  131     INTEN0_CLEAR        = 0x1F7F7F1F, /* Command style register */
  132 
  133 }INTEN0_BITS;
  134 
  135 typedef enum {
  136 
  137     PMAT_DET        = (1 << 12),
  138     MP_DET              = (1 << 11),
  139     LC_DET          = (1 << 10),
  140     SPEED_MASK      = (1 << 9)|(1 << 8)|(1 << 7),
  141     FULL_DPLX       = (1 << 6),
  142     LINK_STATS      = (1 << 5),
  143     AUTONEG_COMPLETE    = (1 << 4),
  144     MIIPD           = (1 << 3),
  145     RX_SUSPENDED        = (1 << 2),
  146     TX_SUSPENDED        = (1 << 1),
  147     RUNNING         = (1 << 0),
  148 
  149 }STAT0_BITS;
  150 
  151 #define PHY_SPEED_10        0x2
  152 #define PHY_SPEED_100       0x3
  153 
  154 
  155 int amd8111e_dump_regs(struct ethtool_drvinfo *info, struct ethtool_regs *regs)
  156 {
  157 
  158     u32 *reg_buff = (u32 *)regs->data;
  159     u32 reg;
  160 
  161     fprintf(stdout, "Descriptor Registers\n");
  162     fprintf(stdout, "---------------------\n");
  163 
  164     /* Transmit descriptor base address register */
  165     reg = reg_buff[0];
  166     fprintf(stdout,
  167         "0x00100: Transmit descriptor base address register %08X\n",reg);
  168 
  169     /* Transmit descriptor length register */
  170     reg = reg_buff[1];
  171     fprintf(stdout,
  172         "0x00140: Transmit descriptor length register 0x%08X\n",reg);
  173 
  174     /* Receive descriptor base address register */
  175     reg = reg_buff[2];
  176     fprintf(stdout,
  177         "0x00120: Receive descriptor base address register %08X\n",reg);
  178 
  179     /* Receive descriptor length register */
  180     reg = reg_buff[3];
  181     fprintf(stdout,
  182         "0x00150: Receive descriptor length register 0x%08X\n",reg);
  183 
  184     fprintf(stdout, "\n");
  185 
  186 
  187     fprintf(stdout, "Command Registers\n");
  188     fprintf(stdout, "-------------------\n");
  189 
  190     /* Command 0 Register */
  191     reg = reg_buff[4];
  192     fprintf(stdout,
  193         "0x00048: Command 0 register  0x%08X\n"
  194         "   Interrupts:             %s\n"
  195         "   Device:                 %s\n",
  196         reg,
  197         reg & INTREN        ? "Enabled"     : "Disabled",
  198         reg & RUN           ? "Running"     : "Stopped");
  199 
  200     /* Command 2 Register */
  201     reg = reg_buff[5];
  202     fprintf(stdout,
  203         "0x00050: Command 2 register  0x%08X\n"
  204         "   Promiscuous mode:           %s\n"
  205         "   Retransmit on underflow:        %s\n",
  206         reg,
  207         reg & PROM          ? "Enabled"     : "Disabled",
  208         reg & REX_UFLO      ? "Enabled"     : "Disabled");
  209     /* Command 3 Register */
  210     reg = reg_buff[6];
  211     fprintf(stdout,
  212         "0x00054: Command 3 register  0x%08X\n"
  213         "   Jumbo frame:                %s\n"
  214         "   Admit only VLAN frame:          %s\n"
  215         "   Delete VLAN tag:            %s\n",
  216         reg,
  217         reg & JUMBO         ? "Enabled"     : "Disabled",
  218         reg &  VLONLY       ? "Yes"     : "No",
  219         reg &  VL_TAG_DEL       ? "Yes"     : "No");
  220 
  221     /* Command 7 Register */
  222     reg = reg_buff[7];
  223     fprintf(stdout,
  224         "0x00064: Command 7 register  0x%08X\n",
  225          reg);
  226 
  227     fprintf(stdout, "\n");
  228     fprintf(stdout, "Interrupt Registers\n");
  229     fprintf(stdout, "-------------------\n");
  230 
  231     /* Interrupt 0 Register */
  232     reg = reg_buff[8];
  233     fprintf(stdout,
  234         "0x00038: Interrupt register  0x%08X\n"
  235         "   Any interrupt is set:           %s\n"
  236         "   Link change interrupt:          %s\n"
  237         "   Register 0 auto-poll interrupt:     %s\n"
  238         "   Transmit interrupt:         %s\n"
  239         "   Software timer interrupt:       %s\n"
  240         "   Receive interrupt:          %s\n",
  241          reg,
  242          reg &   INTR       ? "Yes"     : "No",
  243          reg &   LCINT      ? "Yes"     : "No",
  244          reg &   APINT0     ? "Yes"     : "No",
  245          reg &   TINT0      ? "Yes"     : "No",
  246          reg &   STINT      ? "Yes"     : "No",
  247          reg &   RINT0      ? "Yes"     : "No"
  248          );
  249     /* Interrupt 0 enable Register */
  250     reg = reg_buff[9];
  251     fprintf(stdout,
  252         "0x00040: Interrupt enable register  0x%08X\n"
  253         "   Link change interrupt:          %s\n"
  254         "   Register 0 auto-poll interrupt:     %s\n"
  255         "   Transmit interrupt:         %s\n"
  256         "   Software timer interrupt:       %s\n"
  257         "   Receive interrupt:          %s\n",
  258          reg,
  259          reg &   LCINTEN        ? "Enabled"     : "Disabled",
  260          reg &   APINT0EN       ? "Enabled"     : "Disabled",
  261          reg &   TINTEN0        ? "Enabled"     : "Disabled",
  262          reg &   STINTEN        ? "Enabled"     : "Disabled",
  263          reg &   RINTEN0        ? "Enabled"     : "Disabled"
  264         );
  265 
  266     fprintf(stdout, "\n");
  267     fprintf(stdout, "Logical Address Filter Register\n");
  268     fprintf(stdout, "-------------------\n");
  269 
  270     /* Logical Address Filter Register */
  271     fprintf(stdout,
  272         "0x00168: Logical address filter register  0x%08X%08X\n",
  273          reg_buff[11],reg_buff[10]);
  274 
  275     fprintf(stdout, "\n");
  276     fprintf(stdout, "Link status Register\n");
  277     fprintf(stdout, "-------------------\n");
  278 
  279     /* Status 0  Register */
  280     reg = reg_buff[12];
  281     if(reg & LINK_STATS){
  282     fprintf(stdout,
  283         "0x00030: Link status register  0x%08X\n"
  284         "   Link status:            %s\n"
  285         "   Auto negotiation complete   %s\n"
  286         "   Duplex              %s\n"
  287         "   Speed               %s\n",
  288         reg,
  289         reg &  LINK_STATS       ? "Valid"     : "Invalid",
  290         reg &  AUTONEG_COMPLETE     ? "Yes"       : "No",
  291         reg &  FULL_DPLX        ? "Full"      : "Half",
  292         ((reg & SPEED_MASK) >> 7 == PHY_SPEED_10) ? "10Mbits/ Sec":
  293                             "100Mbits/Sec");
  294 
  295     }
  296     else{
  297     fprintf(stdout,
  298         "0x00030: Link status register  0x%08X\n"
  299         "   Link status:            %s\n",
  300         reg,
  301         reg &  LINK_STATS       ? "Valid"     : "Invalid");
  302     }
  303     return 0;
  304 
  305 }