"Fossies" - the Fresh Open Source Software Archive  

Source code changes of the file "target/alpha/translate.c" between
qemu-6.0.0-rc1.tar.xz and qemu-6.0.0-rc2.tar.xz

About: QEMU is a generic machine/processor emulator and virtualizer. Release candidate.

translate.c  (qemu-6.0.0-rc1.tar.xz):translate.c  (qemu-6.0.0-rc2.tar.xz)
skipping to change at line 1332 skipping to change at line 1332
regno = regno == 39 ? 25 : regno - 32 + 8; regno = regno == 39 ? 25 : regno - 32 + 8;
tcg_gen_mov_i64(va, cpu_std_ir[regno]); tcg_gen_mov_i64(va, cpu_std_ir[regno]);
break; break;
case 250: /* WALLTIME */ case 250: /* WALLTIME */
helper = gen_helper_get_walltime; helper = gen_helper_get_walltime;
goto do_helper; goto do_helper;
case 249: /* VMTIME */ case 249: /* VMTIME */
helper = gen_helper_get_vmtime; helper = gen_helper_get_vmtime;
do_helper: do_helper:
if (icount_enabled()) { if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) {
gen_io_start(); gen_io_start();
helper(va); helper(va);
return DISAS_PC_STALE; return DISAS_PC_STALE;
} else { } else {
helper(va); helper(va);
} }
break; break;
case 0: /* PS */ case 0: /* PS */
ld_flag_byte(va, ENV_FLAG_PS_SHIFT); ld_flag_byte(va, ENV_FLAG_PS_SHIFT);
skipping to change at line 1368 skipping to change at line 1368
} }
break; break;
} }
return DISAS_NEXT; return DISAS_NEXT;
} }
static DisasJumpType gen_mtpr(DisasContext *ctx, TCGv vb, int regno) static DisasJumpType gen_mtpr(DisasContext *ctx, TCGv vb, int regno)
{ {
int data; int data;
DisasJumpType ret = DISAS_NEXT;
switch (regno) { switch (regno) {
case 255: case 255:
/* TBIA */ /* TBIA */
gen_helper_tbia(cpu_env); gen_helper_tbia(cpu_env);
break; break;
case 254: case 254:
/* TBIS */ /* TBIS */
gen_helper_tbis(cpu_env, vb); gen_helper_tbis(cpu_env, vb);
skipping to change at line 1397 skipping to change at line 1398
} }
return gen_excp(ctx, EXCP_HALTED, 0); return gen_excp(ctx, EXCP_HALTED, 0);
case 252: case 252:
/* HALT */ /* HALT */
gen_helper_halt(vb); gen_helper_halt(vb);
return DISAS_PC_STALE; return DISAS_PC_STALE;
case 251: case 251:
/* ALARM */ /* ALARM */
if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) {
gen_io_start();
ret = DISAS_PC_STALE;
}
gen_helper_set_alarm(cpu_env, vb); gen_helper_set_alarm(cpu_env, vb);
break; break;
case 7: case 7:
/* PALBR */ /* PALBR */
tcg_gen_st_i64(vb, cpu_env, offsetof(CPUAlphaState, palbr)); tcg_gen_st_i64(vb, cpu_env, offsetof(CPUAlphaState, palbr));
/* Changing the PAL base register implies un-chaining all of the TBs /* Changing the PAL base register implies un-chaining all of the TBs
that ended with a CALL_PAL. Since the base register usually only that ended with a CALL_PAL. Since the base register usually only
changes during boot, flushing everything works well. */ changes during boot, flushing everything works well. */
gen_helper_tb_flush(cpu_env); gen_helper_tb_flush(cpu_env);
skipping to change at line 1436 skipping to change at line 1441
if (data != 0) { if (data != 0) {
if (data & PR_LONG) { if (data & PR_LONG) {
tcg_gen_st32_i64(vb, cpu_env, data & ~PR_LONG); tcg_gen_st32_i64(vb, cpu_env, data & ~PR_LONG);
} else { } else {
tcg_gen_st_i64(vb, cpu_env, data); tcg_gen_st_i64(vb, cpu_env, data);
} }
} }
break; break;
} }
return DISAS_NEXT; return ret;
} }
#endif /* !USER_ONLY*/ #endif /* !USER_ONLY*/
#define REQUIRE_NO_LIT \ #define REQUIRE_NO_LIT \
do { \ do { \
if (real_islit) { \ if (real_islit) { \
goto invalid_opc; \ goto invalid_opc; \
} \ } \
} while (0) } while (0)
 End of changes. 4 change blocks. 
2 lines changed or deleted 7 lines changed or added

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