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Source code changes of the file "hw/virtio/virtio-pci.c" between
qemu-6.0.0-rc1.tar.xz and qemu-6.0.0-rc2.tar.xz

About: QEMU is a generic machine/processor emulator and virtualizer. Release candidate.

virtio-pci.c  (qemu-6.0.0-rc1.tar.xz):virtio-pci.c  (qemu-6.0.0-rc2.tar.xz)
skipping to change at line 1366 skipping to change at line 1366
if (vdev != NULL && queue < VIRTIO_QUEUE_MAX) { if (vdev != NULL && queue < VIRTIO_QUEUE_MAX) {
virtio_queue_notify(vdev, queue); virtio_queue_notify(vdev, queue);
} }
} }
static uint64_t virtio_pci_isr_read(void *opaque, hwaddr addr, static uint64_t virtio_pci_isr_read(void *opaque, hwaddr addr,
unsigned size) unsigned size)
{ {
VirtIOPCIProxy *proxy = opaque; VirtIOPCIProxy *proxy = opaque;
VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
uint64_t val = qatomic_xchg(&vdev->isr, 0); uint64_t val;
pci_irq_deassert(&proxy->pci_dev);
if (vdev == NULL) {
return 0;
}
val = qatomic_xchg(&vdev->isr, 0);
pci_irq_deassert(&proxy->pci_dev);
return val; return val;
} }
static void virtio_pci_isr_write(void *opaque, hwaddr addr, static void virtio_pci_isr_write(void *opaque, hwaddr addr,
uint64_t val, unsigned size) uint64_t val, unsigned size)
{ {
} }
static uint64_t virtio_pci_device_read(void *opaque, hwaddr addr, static uint64_t virtio_pci_device_read(void *opaque, hwaddr addr,
unsigned size) unsigned size)
{ {
VirtIOPCIProxy *proxy = opaque; VirtIOPCIProxy *proxy = opaque;
VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
uint64_t val = 0; uint64_t val;
if (vdev == NULL) { if (vdev == NULL) {
return val; return 0;
} }
switch (size) { switch (size) {
case 1: case 1:
val = virtio_config_modern_readb(vdev, addr); val = virtio_config_modern_readb(vdev, addr);
break; break;
case 2: case 2:
val = virtio_config_modern_readw(vdev, addr); val = virtio_config_modern_readw(vdev, addr);
break; break;
case 4: case 4:
val = virtio_config_modern_readl(vdev, addr); val = virtio_config_modern_readl(vdev, addr);
break; break;
default:
val = 0;
break;
} }
return val; return val;
} }
static void virtio_pci_device_write(void *opaque, hwaddr addr, static void virtio_pci_device_write(void *opaque, hwaddr addr,
uint64_t val, unsigned size) uint64_t val, unsigned size)
{ {
VirtIOPCIProxy *proxy = opaque; VirtIOPCIProxy *proxy = opaque;
VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus); VirtIODevice *vdev = virtio_bus_get_device(&proxy->bus);
skipping to change at line 1849 skipping to change at line 1857
pcie_cap_lnkctl_init(pci_dev); pcie_cap_lnkctl_init(pci_dev);
} }
if (proxy->flags & VIRTIO_PCI_FLAG_INIT_PM) { if (proxy->flags & VIRTIO_PCI_FLAG_INIT_PM) {
/* Init Power Management Control Register */ /* Init Power Management Control Register */
pci_set_word(pci_dev->wmask + pos + PCI_PM_CTRL, pci_set_word(pci_dev->wmask + pos + PCI_PM_CTRL,
PCI_PM_CTRL_STATE_MASK); PCI_PM_CTRL_STATE_MASK);
} }
if (proxy->flags & VIRTIO_PCI_FLAG_ATS) { if (proxy->flags & VIRTIO_PCI_FLAG_ATS) {
pcie_ats_init(pci_dev, last_pcie_cap_offset); pcie_ats_init(pci_dev, last_pcie_cap_offset,
proxy->flags & VIRTIO_PCI_FLAG_ATS_PAGE_ALIGNED);
last_pcie_cap_offset += PCI_EXT_CAP_ATS_SIZEOF; last_pcie_cap_offset += PCI_EXT_CAP_ATS_SIZEOF;
} }
if (proxy->flags & VIRTIO_PCI_FLAG_INIT_FLR) { if (proxy->flags & VIRTIO_PCI_FLAG_INIT_FLR) {
/* Set Function Level Reset capability bit */ /* Set Function Level Reset capability bit */
pcie_cap_flr_init(pci_dev); pcie_cap_flr_init(pci_dev);
} }
} else { } else {
/* /*
* make future invocations of pci_is_express() return false * make future invocations of pci_is_express() return false
skipping to change at line 1926 skipping to change at line 1935
DEFINE_PROP_BIT("modern-pio-notify", VirtIOPCIProxy, flags, DEFINE_PROP_BIT("modern-pio-notify", VirtIOPCIProxy, flags,
VIRTIO_PCI_FLAG_MODERN_PIO_NOTIFY_BIT, false), VIRTIO_PCI_FLAG_MODERN_PIO_NOTIFY_BIT, false),
DEFINE_PROP_BIT("x-disable-pcie", VirtIOPCIProxy, flags, DEFINE_PROP_BIT("x-disable-pcie", VirtIOPCIProxy, flags,
VIRTIO_PCI_FLAG_DISABLE_PCIE_BIT, false), VIRTIO_PCI_FLAG_DISABLE_PCIE_BIT, false),
DEFINE_PROP_BIT("page-per-vq", VirtIOPCIProxy, flags, DEFINE_PROP_BIT("page-per-vq", VirtIOPCIProxy, flags,
VIRTIO_PCI_FLAG_PAGE_PER_VQ_BIT, false), VIRTIO_PCI_FLAG_PAGE_PER_VQ_BIT, false),
DEFINE_PROP_BOOL("x-ignore-backend-features", VirtIOPCIProxy, DEFINE_PROP_BOOL("x-ignore-backend-features", VirtIOPCIProxy,
ignore_backend_features, false), ignore_backend_features, false),
DEFINE_PROP_BIT("ats", VirtIOPCIProxy, flags, DEFINE_PROP_BIT("ats", VirtIOPCIProxy, flags,
VIRTIO_PCI_FLAG_ATS_BIT, false), VIRTIO_PCI_FLAG_ATS_BIT, false),
DEFINE_PROP_BIT("x-ats-page-aligned", VirtIOPCIProxy, flags,
VIRTIO_PCI_FLAG_ATS_PAGE_ALIGNED_BIT, true),
DEFINE_PROP_BIT("x-pcie-deverr-init", VirtIOPCIProxy, flags, DEFINE_PROP_BIT("x-pcie-deverr-init", VirtIOPCIProxy, flags,
VIRTIO_PCI_FLAG_INIT_DEVERR_BIT, true), VIRTIO_PCI_FLAG_INIT_DEVERR_BIT, true),
DEFINE_PROP_BIT("x-pcie-lnkctl-init", VirtIOPCIProxy, flags, DEFINE_PROP_BIT("x-pcie-lnkctl-init", VirtIOPCIProxy, flags,
VIRTIO_PCI_FLAG_INIT_LNKCTL_BIT, true), VIRTIO_PCI_FLAG_INIT_LNKCTL_BIT, true),
DEFINE_PROP_BIT("x-pcie-pm-init", VirtIOPCIProxy, flags, DEFINE_PROP_BIT("x-pcie-pm-init", VirtIOPCIProxy, flags,
VIRTIO_PCI_FLAG_INIT_PM_BIT, true), VIRTIO_PCI_FLAG_INIT_PM_BIT, true),
DEFINE_PROP_BIT("x-pcie-flr-init", VirtIOPCIProxy, flags, DEFINE_PROP_BIT("x-pcie-flr-init", VirtIOPCIProxy, flags,
VIRTIO_PCI_FLAG_INIT_FLR_BIT, true), VIRTIO_PCI_FLAG_INIT_FLR_BIT, true),
DEFINE_PROP_BIT("aer", VirtIOPCIProxy, flags, DEFINE_PROP_BIT("aer", VirtIOPCIProxy, flags,
VIRTIO_PCI_FLAG_AER_BIT, false), VIRTIO_PCI_FLAG_AER_BIT, false),
 End of changes. 7 change blocks. 
5 lines changed or deleted 16 lines changed or added

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