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Source code changes of the file "hw/isa/vt82c686.c" between
qemu-6.0.0-rc1.tar.xz and qemu-6.0.0-rc2.tar.xz

About: QEMU is a generic machine/processor emulator and virtualizer. Release candidate.

vt82c686.c  (qemu-6.0.0-rc1.tar.xz):vt82c686.c  (qemu-6.0.0-rc2.tar.xz)
skipping to change at line 147 skipping to change at line 147
static void pm_update_sci(ViaPMState *s) static void pm_update_sci(ViaPMState *s)
{ {
int sci_level, pmsts; int sci_level, pmsts;
pmsts = acpi_pm1_evt_get_sts(&s->ar); pmsts = acpi_pm1_evt_get_sts(&s->ar);
sci_level = (((pmsts & s->ar.pm1.evt.en) & sci_level = (((pmsts & s->ar.pm1.evt.en) &
(ACPI_BITMASK_RT_CLOCK_ENABLE | (ACPI_BITMASK_RT_CLOCK_ENABLE |
ACPI_BITMASK_POWER_BUTTON_ENABLE | ACPI_BITMASK_POWER_BUTTON_ENABLE |
ACPI_BITMASK_GLOBAL_LOCK_ENABLE | ACPI_BITMASK_GLOBAL_LOCK_ENABLE |
ACPI_BITMASK_TIMER_ENABLE)) != 0); ACPI_BITMASK_TIMER_ENABLE)) != 0);
pci_set_irq(&s->dev, sci_level); if (pci_get_byte(s->dev.config + PCI_INTERRUPT_PIN)) {
/*
* FIXME:
* Fix device model that realizes this PM device and remove
* this work around.
* The device model should wire SCI and setup
* PCI_INTERRUPT_PIN properly.
* If PIN# = 0(interrupt pin isn't used), don't raise SCI as
* work around.
*/
pci_set_irq(&s->dev, sci_level);
}
/* schedule a timer interruption if needed */ /* schedule a timer interruption if needed */
acpi_pm_tmr_update(&s->ar, (s->ar.pm1.evt.en & ACPI_BITMASK_TIMER_ENABLE) && acpi_pm_tmr_update(&s->ar, (s->ar.pm1.evt.en & ACPI_BITMASK_TIMER_ENABLE) &&
!(pmsts & ACPI_BITMASK_TIMER_STATUS)); !(pmsts & ACPI_BITMASK_TIMER_STATUS));
} }
static void pm_tmr_timer(ACPIREGS *ar) static void pm_tmr_timer(ACPIREGS *ar)
{ {
ViaPMState *s = container_of(ar, ViaPMState, ar); ViaPMState *s = container_of(ar, ViaPMState, ar);
pm_update_sci(s); pm_update_sci(s);
} }
skipping to change at line 170 skipping to change at line 181
{ {
ViaPMState *s = VIA_PM(d); ViaPMState *s = VIA_PM(d);
memset(s->dev.config + PCI_CONFIG_HEADER_SIZE, 0, memset(s->dev.config + PCI_CONFIG_HEADER_SIZE, 0,
PCI_CONFIG_SPACE_SIZE - PCI_CONFIG_HEADER_SIZE); PCI_CONFIG_SPACE_SIZE - PCI_CONFIG_HEADER_SIZE);
/* Power Management IO base */ /* Power Management IO base */
pci_set_long(s->dev.config + 0x48, 1); pci_set_long(s->dev.config + 0x48, 1);
/* SMBus IO base */ /* SMBus IO base */
pci_set_long(s->dev.config + 0x90, 1); pci_set_long(s->dev.config + 0x90, 1);
acpi_pm1_evt_reset(&s->ar);
acpi_pm1_cnt_reset(&s->ar);
acpi_pm_tmr_reset(&s->ar);
pm_update_sci(s);
pm_io_space_update(s); pm_io_space_update(s);
smb_io_space_update(s); smb_io_space_update(s);
} }
static void via_pm_realize(PCIDevice *dev, Error **errp) static void via_pm_realize(PCIDevice *dev, Error **errp)
{ {
ViaPMState *s = VIA_PM(dev); ViaPMState *s = VIA_PM(dev);
pci_set_word(dev->config + PCI_STATUS, PCI_STATUS_FAST_BACK | pci_set_word(dev->config + PCI_STATUS, PCI_STATUS_FAST_BACK |
PCI_STATUS_DEVSEL_MEDIUM); PCI_STATUS_DEVSEL_MEDIUM);
 End of changes. 2 change blocks. 
1 lines changed or deleted 17 lines changed or added

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